ACADSTAFF UGM
| Judul/Title | Jitter Clock Effect Analysis on Modular Dual Active Bridge (MDAB) Converter |
| Penulis/Author | Musyaffa' Ahmad (1); Mudarris (2); Ir. Eka Firmansyah, S.T., M.Eng., Ph.D., IPM. (3); Prof. Dr. Eng. Ir. F. Danang Wijaya, S.T., M.T., IPM. (4); Dr.-Ing. Ir. Yohan Fajar Sidik, S.T., M.Eng. (5); KRISHNA LAKSHETA (6); LATHIEF NURMAHMUDI W (7) |
| Tanggal/Date | 2023 |
| Kata Kunci/Keyword | |
| Abstrak/Abstract | The modular converter topology of Dual Active Bridge (DAB) is designed to distribute voltage and current evenly among each submodule. This process requires fast and accurate computation for pulse-width modulation (PWM) and feedback signals. During implementation, signal process- ing on the microcontroller faces various disturbances, one of which is clock jitter. Clock jitter has a proven negative impact on the performance of controller systems. Output stability in controllers with a single submodule can be significantly affected by jitter. This effect could lead to more harmful disturbances if implemented in modular converter circuits. The purpose of this research is to analyze the effect of clock jitter on the modular DAB circuit. The test was conducted by implementing a jitter value within a specific range. This value was then tested on a modular DAB simulation comprising of two submodules and various switching frequency. Based on these results, it can be seen that jitter interference in one of the DAB submodules can affect system performance. The voltage and current ripple values of the DAB1 and jittered DAB2 modules both increase with higher values of jitter and switching frequencies. This increased ripple causes the load voltage and current to become unstable. Consequently, this instability will negatively affect the performance of the system. |
| Level | Internasional |
| Status |